Your team keeps failing EMC tests. The reason is conceptual.
It's not a layout problem. It's not a component problem. It's a mental model problem — and until your team replaces "grounding and shielding" with "return paths and field containment," you'll keep losing weeks to the chamber.
Read post →Radiated Emissions Testing and the Role of EMC Current Clamps
How current clamps capture differential and common mode currents, translate them into estimated field strength, and help engineers identify emission sources before they reach the chamber.
Read post →Redefining Current and Charge: A Field-Based Perspective on Electromagnetism
Electrons drift at 73 µm/s. Signals propagate at 150 million m/s. Something in the classical model is wrong. A field-first reframing resolves the contradiction and changes how you design.
Read post →Why Smart Engineers Fail EMC Tests (It's Not What You Think)
The failure isn't technical knowledge — it's the mismatch between how engineers model electromagnetic behaviour and how physics actually works.
Read post →Optimizing PCB Stackup Design: Power and Return Path Considerations
The layer sequence you choose in the first 20 minutes of a new board determines most of your EMC outcome. Here's how to get it right.
Read post →EMC Filter Topologies: EMI Control Strategies in Electronics Design
Five filter configurations, their insertion loss behaviour, and exactly where each belongs — as a function of the impedance environment, not folklore.
Read post →Managing EMI: Low and High-Speed Signal Return Currents
Return current doesn't follow ground. It follows the path of least impedance — and at high frequency, that's nothing like what you drew in the schematic.
Read post →How to Conduct an EMI Design Review for Your PCB
A structured walkthrough of a full EMI design review — from stackup to connector placement. What to look for, in what order, and why.
Read post →Understanding Radiated Emissions: What You Need to Know for EMI Compliance
How radiated emissions arise from differential and common mode currents — and how layout, stackup, loop area, filtering, and shielding decide whether your design passes FCC and CE testing.
Read post →Understanding ESD: How to Protect Your Electronics from Electrostatic Discharge
Why ESD current ignores the earth wire and rides parasitic capacitance instead — from the triboelectric effect and human body model to chassis bonding, TVS placement, and plastic enclosures.
Read post →Conducted Emissions
Why products fail the 150 kHz–30 MHz conducted emissions test — and how the LISN, SMPS parasitics, and proper EMI filter design determine whether yours passes.
Read post →Power Delivery Network (PDN) for Low EMI
How to design a power delivery network that keeps EMI under control: transient current calculations, decoupling myths, placement strategy, and how many capacitors you actually need.
Read post →PCB Layout Review for EMC and Signal Integrity — MPPT Charge Controller
A line-by-line EMC and signal-integrity review of an MPPT solar charge controller PCB — two-layer stackup pitfalls, antenna-like pours, crosstalk, stubs, and what to do when you can't add layers.
Read post →i.MX8 SOM — EMI Design Layout Review
A layer-by-layer EMC review of an i.MX8 system-on-module — stackup pairing, return reference planes, copper-pour antennas, plane splits, and missing return vias.
Read post →The Concept of Electromagnetic Fields in a PCB
PCBs don't conduct electrons — they guide electromagnetic fields. Understanding what that means changes how you lay out every trace.
Read post →Understanding 90-Degree Bends in PCB Design
Settled by impedance discontinuity analysis and the frequencies you're actually running — not by folklore or outdated rules of thumb.
Read post →Power Planes as Return Reference Planes: Challenges and Solutions in Multilayer Stackups
The challenges of using power planes as return reference planes in multilayer stackups — and the design solutions that avoid the EMI cost.
Read post →Mastering Electromagnetic Interference: Elevate Electronics with EMC Design
Where EMI comes from, how it couples into your circuits, and the design discipline that keeps it under control from the first schematic.
Read post →Mastering PCB Design with IPC-2221: The Industry's Foundational Standard
What IPC-2221 covers, why it's the foundational standard for PCB design, and how to apply it to spacing, materials, and reliability decisions.
Read post →The Essentials of Electromagnetic Compatibility Training
Why EMC training matters for device reliability and compliance — and what a useful curriculum actually covers, from theory to hands-on testing.
Read post →Why ‘Ground’ Falls Short: A Call for a Clearer Term in Circuit Design
Where the term "ground" came from, why it misleads, and how return current actually behaves — from resistance-driven spreading at low frequency to tight trace-hugging loops at high frequency.
Read post →Understanding EN 61000-4-6: A Key Standard for Conducted RF Immunity in EMC Design
The conducted RF immunity standard from 150 kHz to 80 MHz: CDN injection setups, 1/3/10 V test levels, performance criteria A/B/C, and how to design for it up front.
Read post →How Return Reference Planes Impact EMI Control in PCB Design
Why routing signal and power traces adjacent to a continuous return reference plane is the overlooked fundamental of EMI control — from the schematic "ground" misconception to loop area and compliance.
Read post →Why EMI Keeps Ruining Your PCB Designs (And What to Do Before It’s Too Late)
Most PCB EMI problems arise internally — from stackup choices, impedance discontinuities, broken signal references, and layout-driven EM fields. How to tackle each at the source.
Read post →The Pitfalls of Overreliance on Post-Design Fixes in EMC Compliance
Filters, shields, and retrofitted grounding added after layout treat symptoms, not causes. Integrating EMC from the first design phase is the cheaper path to compliance.
Read post →Signal Integrity: The Key to EMC Compliance for Electronic Engineers
Reference plane integrity, crosstalk, and trace impedance decide whether a board passes radiated emissions — with concrete steps to stay inside CISPR 32 limits.
Read post →Optimizing PCB Layout for EMI Control: Managing Fast-Changing Currents
Physics-based layout for high di/dt currents: loop minimization, ground-plane field cancellation, and prioritizing the switch and diode loops in buck converters.
Read post →Mastering Input Filter Design: Achieving EMC Compliance for Power Converters
How input filters suppress conducted EMI in switching converters, their effect on closed-loop stability, and LISN-based testing against EN 55022 limits.
Read post →Mastering PCB Design: Tips for Beginners
Practical tips for getting started: essential software like KiCad and Altium, layout and routing best practices, manufacturing constraints, and testing your first board.
Read post →Your First Steps in PCB Design: A Beginner’s Guide
A structured starting path: key terms like schematics and Gerber files, software options from KiCad to Altium, and a walkthrough of designing, ordering, and testing your first board.
Read post →A Field-Centric View of Energy Transfer in Classical Electromagnetism
Where does electrical energy actually flow? Not through the wire. The Poynting vector and Gauss's law inverted — with practical consequences for PCB design.
Read post →Common-Mode Filters: Why Most Engineers Install Them In The Wrong Place
Placement is a physics constraint, not a preference. A filter in the wrong location can make emissions worse.
The Pre-Compliance Mindset: Run Your Own EMC Scan Before the Chamber
Build the diagnostic reflex that connects every bump in the scan to a physical structure in your design.
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Dario Fresu is a fourth-generation electrical professional, IPC Certified Interconnect Designer, and former ETH Zurich lead hardware engineer. He has trained thousands of engineers worldwide and built one of the largest independent EMC education platforms in the industry.